This paper proposes a CMOS flat-panel X-ray detector (FPXD) with dual-gain active pixel sensors (APSs) and column-parallel readout circuits to reduce the random noise. The proposed dual-gain APS employs the conversion gain control in a pixel sensor array and supports both high and low sensitivity modes for FPXD. The in-pixel conversion gain control suppresses the amplification of the pixel noise, so it improves signal-to-noise characteristics. The column-parallel readout circuits include single-slope analog-to-digital converters (SS-ADCs) and charge-summing circuits for pixel binning and analog double delta sampling (DDS). SS-ADCs support 12-bit resolution and use the driving method of gray-code counters with different initial values to reduce the peak current and the power fluctuation.
They also employ a high resolution continuous-type ramp generator to reduce the area. The proposed CMOS FPXD with a pixel size of 100 μm × 100 μm was fabricated using a 0.18-μm CMOS process. The conversion gains in high and low sensitivity modes are designed with 0.43 μV/e– and 3.00 μV/e–, respectively. The measured random noises in high and low sensitivity modes are 366 μV and 400 μV, respectively, at the resolution of 12 bits and the frame rate of 30 fps. The area of ramp generator and the peak current of the gray-code counter are reduced by 92% and 43%, respectively, compared with the conventional structures.