Highly linear continuous-time MASH ΔΣ ADC with dual VCO-based quantizers

This paper proposes a new continuous-time (CT) MASH delta sigma (ΔΣ) modulator topology in which dual VCO-based quantizers are incorporated. The nonlinearity of both voltage-controlled oscillators (VCOs) caused by their nonlinear voltage-to-frequency (V-to-F) transfer curve are systematically suppressed without any calibration schemes. After the input voltage is directly digitized by a VCO-based quantizer (VCOQ), the residue error, obtained through passive subtraction with a current digital-to-analog converter (DAC), contains its noise-shaped quantization noise as well as the harmonics.

This residue error is subsequently processed for fine digitization via a 2nd-order CT ΔΣ modulator where a second VCOQ is incorporated. The harmonics in the first VCOQ’s output are fully cancelled at the finaldigital output, which is collected by summing together the digital bits of the two VCOQs. Behavioral-model simulations demonstrate a 49dB SNDR improvement from the first VCOQ of only 39.3dB SNDR.

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