The increasing demand of computation capacity has made many-core parallel processing (MPP) a compelling choice for computation-intensive applications. The networks-on-chip (NoC) architecture is an effective way to interconnect dozens of processing cores, while the logic circuits and the actual performance need to be verified in specific platform. We proposed and implemented the MACRON platform to provide verification for complicated applications based on NoC architecture by coordinating the software tool and the hardware devices closely.
In MACRON, the virtual output queue with look-ahead routing is proposed to reduce the transmission delay through the NoC router. The heterogeneousprocessing elements: vector processor core, scalar processor core and accelerator core are designed, thus a thorough ‘soft’ signal processing can be approached. A real-time 4G wireless communication system based on NoC is demonstrated on this MACRON platform.